1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to apparatus and methods for packaging a semiconductor chip with a thermal interface material.
2. Description of the Related Art
Many current integrated circuits are formed as multiple die on a common wafer. After the basic process steps to form the circuits on the die are complete, the individual die are cut from the wafer. The cut die are then usually mounted to structures, such as circuit boards, or packaged in some form of enclosure.
One frequently-used package consists of a substrate upon which a die is mounted. The upper surface of the substrate includes electrical interconnects. The die is manufactured with a plurality of bond pads. A collection of solder bumps are provided between the bond pads of the die and the substrate interconnects to establish ohmic contact. After the die is mounted to the substrate, a lid is attached to the substrate to cover the die. Some conventional integrated circuits, such as microprocessors, generate sizeable quantities of heat that must be transferred away to avoid device shutdown or damage. The lid serves as both a protective cover and a heat transfer pathway.
To provide a heat transfer pathway from the integrated circuit to the lid, a thermal interface material is placed on the upper surface of the integrated circuit. In an ideal situation, the thermal interface material ideally fully contacts both the upper surface of the integrated circuit and the portion of the lower surface of the lid that overlies the integrated circuit. Conventional thermal interface materials include various types of pastes, and in some cases, a metal. Gel-type thermal interface materials consist of a polymeric matrix interspersed with thermally conductive particles, such as aluminum. More recently, designers have begun to turn to indium as a thermal interface material, particularly for high power-high temperature chips.
A metal thermal interface material like indium has favorable thermal properties that work well for high power-high temperature die. However, indium exhibits relatively poor adhesion to silicon. To facilitate bonding with indium, the backside of a silicon die may be provided with a metallization stack that includes a layer that readily adheres to silicon, a layer that readily wets indium and perhaps one or more intermediary barrier or other layers. An entire wafer of dice may be provided with respective metallization stacks en masse prior to dicing.
Not all dice on a given wafer clock natively at the same speed. Those chips that natively clock higher may be selected for high performance applications and markets. Those chips that natively clock out at slower speeds may still be quite useful in less intensive computing environments where the thermal environment is correspondingly less hostile. For the slower chips, a metal thermal interface material may not be necessary to carry the thermal load and may even be carry an economic penalty. In such circumstances, it may be desirable to use a gel-type thermal interface material.
Unfortunately, gel-type thermal interface materials do not adhere well with at least one conventional design for a backside metallization stack that uses a gold film as the top-most layer. Inevitable flexure of the die and package substrate can stretch the thermal interface material and cause delamination where there is poor adhesion with the gold film. Delamination causes the thermal resistance of the pathway from the chip to the lid to climb, perhaps to the point of thermal shutdown. The flexing behavior of a substrate mounted die is a rather complex interplay of various factors. In a typical system, the die, the substrate and an underfill material between the two each exhibit a different coefficient of thermal expansion (CTE). The differences are sometimes a factor of ten or more. Not surprisingly then, the die and the substrate flex at different rates as a function of temperature. As a result, the substrate and die usually exhibit some amount of warpage that is dependent on temperature. The amount of warpage is frequently greatest at near room temperatures and decreases with increasing temperature. At high temperatures associated with device operation and the thermal cures used to cure conventional thermal interface materials and lid adhesives, the substrate and die tend to flatten. As the die and substrate flatten, the conventional thermal interface material layer is subjected to tensile forces that can cause voids and delamination.
A conventional gel-type thermal interface material contains a small initial concentration of platinum that is designed to acts as a catalyst to improve bonding between a conventional gold film and the thermal interface material. The platinum particles are mixed into the gel prior to application to the gold film. Through mechanisms that are not well understood, the catalytic properties become poisoned by the gold film. Less than optimal bonding may occur and the risk of delamination remains.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.